The present invention relates to a differential amplifier employed in a semiconductor integrated circuit, and more particularly to a differential amplifier whose gain is variable.
1. Field of the Invention
2. Description of the Background Art
FIG. 6 is a circuit diagram showing a conventional variable gain amplifier 300. A differential input unit 202 which is connected to differential input terminals 93 and 94 receives differential input signals. The differential input unit 202 is provided with a constant current by a current supply unit 201 and on the basis of the constant current, outputs two currents (hereinafter referred to as "differential current") in response to the differential input signals (hereinafter the operation of outputting the two currents in response to the differential input signals is referred to as "differential operation"). A gain control unit 203 amplifies the two differential currents at a predetermined gain (also may be a case where the gain is under 1, i.e., a case of substantial attenuation, and the same applies hereinafter) and outputs differential output signals to differential output terminals 95 and 96.
The differential input unit 202 is connected to an input bias unit 204 which determines a bias to be applied to the differential input signal. The gain control unit 203 is connected to a gain bias unit 205 which determines two different bias potentials to control gains of the gain control unit 203.
The differential input unit 202 consists of transistors 33, 34 and a resistor 51. The differential input signals are applied to bases of the transistors 33 and 34, and thereafter two differential currents flow into collectors thereof.
The gain control unit 203 comprises two pairs of transistors 35, 36 and transistors 37, 38. Two emitters of each pair of transistors are connected to the same transistor in common. The former pair receives a differential current from a collector of the transistor 33 and the latter receives another differential current from a collector of the transistor 34.
Bases of the transistors 35 and 38 are connected in common and receive one of the two different bias potentials from the gain bias unit 205. Bases of the transistors 36 and 37 are also connected in common and receive the other of the two different bias potentials. Collectors of the transistors 36 and 37 are connected to a voltage source 81 through resistors 52 and 53, respectively and the differential output signals are drawn out of the collectors of these transistors.
The gain of the variable gain amplifier is determined depending on the ratios of currents in the resistors 52 and 53 to collector currents of the transistors 33 and 34, respectively. The ratio is controlled by varying the collector currents of the transistors 35 to 38. Further, the collector currents of the transistors 35 to 38 are controlled according to the two different bias potentials which are provided by the gain bias unit 205.
The gain bias unit 205 comprises transistors 12 to 14, 39 and 40. The transistors 39, 13 and the resistor 55, and the transistors 40, 14 and the resistor 56 are connected in series, respectively. The transistor 12 is connected to the resistor 54 and a current source 61 in series. Along with the transistors 13, 14 and the resistors 55, 56, the transistor 12 provides a constant current to the transistors 39 and 40. The bases of the transistors 39 and 40 are connected to a voltage source 83 and two different bias potentials are drawn out of the emitters thereof.
Assuming now that base-emitter voltages of the transistors 35, 36, 39 and are V.sub.35, V.sub.36, V.sub.39 and V.sub.40, collector currents of the transistors 35 and 36 are I.sub.35 and I.sub.36 and emitter currents of the transistors 39 and 40 are I.sub.39 and I.sub.40, respectively, they are expressed as follows: ##EQU1## wherein K and I.sub.0 are constants.
From FIG. 6, the following can be seen: EQU V.sub.36 -V.sub.35 =V.sub.39 -V.sub.40 ( 2)
Then, the following expressions can be deduced from Formulae 1 and 2: ##EQU2## Accordingly, the currents can be expressed as follows: ##EQU3## Therefore, the ratio of the current in the resistor 52 out of the collector current of the transistor 33 is I.sub.39 / (I.sub.39 +I.sub.40). Similarly, the ratio of the current in the resistor 53 out of the collector current of the transistor 34 is also I.sub.39 / (I.sub.39 +1.sub.40), and these ratios are equal to each other. Ignoring the base currents of the transistors 35 to 38, the emitter currents I.sub.39 and I.sub.40 of the transistors 39 and 40 can be set from zero to an arbitrary amount by selecting appropriate resistance values of the resistors 55 and 56.
When the emitter currents I.sub.39 and I.sub.40 are set so that the collector current of the transistor 33 may entirely flow into the resistor 52, the ratio of an amplitude V.sub.o of the differential output signal to be outputted between the differential output terminals 95 and 96 to an amplitude V.sub.i of the differential input signal to be provided between the differential input terminals 93 and 94, i.e., a gain G.sub.max may be expressed as follows; ##EQU4## where R.sub.E, R.sub.L and r.sub.e are resistance values of the resistors 51, 52 and the emitter resistance of each transistor, respectively. Accordingly, the gain G of the variable gain amplifier can be deduced from Formulae 4 and 5 as follows: ##EQU5## That is, a variable range of the gain in the amplifier is 0.about.R.sub.L / (R.sub.E /2+r.sub.e), ignoring the base currents of the transistors 35 to 38.
A potential V.sub.81 provided by the voltage source 81 which is equipped in the gain control unit 203 should be over a certain minimum value. Assuming that saturation voltages of the transistors 6, 33 and 36 are each V.sub.sat and base-emitter voltages of the transistors 33 and 34 are each V.sub.be, the potential V.sub.81 should be over at least the following value: EQU V.sub.81 =V.sub.sat +V.sub.be +V.sub.i -V.sub.be +V.sub.sat +V.sub.sat +V.sub.O =3V.sub.sat +V.sub.i +V.sub.O ( 7)
Thus, because of the recent tendency to reduce power supply potential, there arises a problem that the conventional variable gain amplifier can only process a signal having small amplitude.